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Architecture Design for Soft Errors

Architecture Design for Soft Errors
A Book

by Shubu Mukherjee

  • Publisher : Morgan Kaufmann Pub
  • Release : 2008
  • Pages : 337
  • ISBN : 9780123695291
  • Language : En, Es, Fr & De
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This book provides a comprehensive description of the architetural techniques to tackle the soft error problem. It covers the new methodologies for quantitative analysis of soft errors as well as novel, cost-effective architectural techniques to mitigate them. To provide readers with a better grasp of the broader problem deffinition and solution space, this book also delves into the physics of soft errors and reviews current circuit and software mitigation techniques. TABLE OF CONTENTS Chapter 1: Introduction Chapter 2: Device- and Circuit-Level Modeling, Measurement, and Mitigation Chapter 3: Architectural Vulnerability Analysis Chapter 4: Advanced Architectural Vulnerability Analysis Chapter 5: Error Coding Techniques Chapter 6: Fault Detection via Redundant Execution Chapter 7: Hardware Error Recovery Chapter 8: Software Detection and Recovery * Provides the methodologies necessary to quantify the effect of radiation-induced soft errors as well as state-of-the-art techniques to protect against them

Architecture Design for Soft Errors

Architecture Design for Soft Errors
A Book

by Shubu Mukherjee

  • Publisher : Morgan Kaufmann
  • Release : 2011-08-29
  • Pages : 360
  • ISBN : 9780080558325
  • Language : En, Es, Fr & De
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Architecture Design for Soft Errors provides a comprehensive description of the architectural techniques to tackle the soft error problem. It covers the new methodologies for quantitative analysis of soft errors as well as novel, cost-effective architectural techniques to mitigate them. To provide readers with a better grasp of the broader problem definition and solution space, this book also delves into the physics of soft errors and reviews current circuit and software mitigation techniques. There are a number of different ways this book can be read or used in a course: as a complete course on architecture design for soft errors covering the entire book; a short course on architecture design for soft errors; and as a reference book on classical fault-tolerant machines. This book is recommended for practitioners in semi-conductor industry, researchers and developers in computer architecture, advanced graduate seminar courses on soft errors, and (iv) as a reference book for undergraduate courses in computer architecture. Helps readers build-in fault tolerance to the billions of microchips produced each year, all of which are subject to soft errors Shows readers how to quantify their soft error reliability Provides state-of-the-art techniques to protect against soft errors

Soft Error Reliability Using Virtual Platforms

Soft Error Reliability Using Virtual Platforms
Early Evaluation of Multicore Systems

by Felipe Rocha da Rosa,Luciano Ost,Ricardo Reis

  • Publisher : Springer Nature
  • Release : 2020-11-02
  • Pages : 136
  • ISBN : 3030557049
  • Language : En, Es, Fr & De
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This book describes the benefits and drawbacks inherent in the use of virtual platforms (VPs) to perform fast and early soft error assessment of multicore systems. The authors show that VPs provide engineers with appropriate means to investigate new and more efficient fault injection and mitigation techniques. Coverage also includes the use of machine learning techniques (e.g., linear regression) to speed-up the soft error evaluation process by pinpointing parameters (e.g., architectural) with the most substantial impact on the software stack dependability. This book provides valuable information and insight through more than 3 million individual scenarios and 2 million simulation-hours. Further, this book explores machine learning techniques usage to navigate large fault injection datasets.

Soft Errors

Soft Errors
From Particles to Circuits

by Jean-Luc Autran,Daniela Munteanu

  • Publisher : CRC Press
  • Release : 2015-02-25
  • Pages : 439
  • ISBN : 146659084X
  • Language : En, Es, Fr & De
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Soft errors are a multifaceted issue at the crossroads of applied physics and engineering sciences. Soft errors are by nature multiscale and multiphysics problems that combine not only nuclear and semiconductor physics, material sciences, circuit design, and chip architecture and operation, but also cosmic-ray physics, natural radioactivity issues, particle detection, and related instrumentation. Soft Errors: From Particles to Circuits addresses the problem of soft errors in digital integrated circuits subjected to the terrestrial natural radiation environment—one of the most important primary limits for modern digital electronic reliability. Covering the fundamentals of soft errors as well as engineering considerations and technological aspects, this robust text: Discusses the basics of the natural radiation environment, particle interactions with matter, and soft-error mechanisms Details instrumentation developments in the fields of environment characterization, particle detection, and real-time and accelerated tests Describes the latest computational developments, modeling, and simulation strategies for the soft error-rate estimation in digital circuits Explores trends for future technological nodes and emerging devices Soft Errors: From Particles to Circuits presents the state of the art of this complex subject, providing comprehensive knowledge of the complete chain of the physics of soft errors. The book makes an ideal text for introductory graduate-level courses, offers academic researchers a specialized overview, and serves as a practical guide for semiconductor industry engineers or application engineers.

Resilient Architecture Design for Voltage Variation

Resilient Architecture Design for Voltage Variation
A Book

by Vijay Janapa Reddi,Meeta Sharma Gupta

  • Publisher : Morgan & Claypool Publishers
  • Release : 2013-05-01
  • Pages : 138
  • ISBN : 1608456382
  • Language : En, Es, Fr & De
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Shrinking feature size and diminishing supply voltage are making circuits sensitive to supply voltage fluctuations within the microprocessor, caused by normal workload activity changes. If left unattended, voltage fluctuations can lead to timing violations or even transistor lifetime issues that degrade processor robustness. Mechanisms that learn to tolerate, avoid, and eliminate voltage fluctuations based on program and microarchitectural events can help steer the processor clear of danger, thus enabling tighter voltage margins that improve performance or lower power consumption. We describe the problem of voltage variation and the factors that influence this variation during processor design and operation. We also describe a variety of runtime hardware and software mitigation techniques that either tolerate, avoid, and/or eliminate voltage violations. We hope processor architects will find the information useful since tolerance, avoidance, and elimination are generalizable constructs that can serve as a basis for addressing other reliability challenges as well. Table of Contents: Introduction / Modeling Voltage Variation / Understanding the Characteristics of Voltage Variation / Traditional Solutions and Emerging Solution Forecast / Allowing and Tolerating Voltage Emergencies / Predicting and Avoiding Voltage Emergencies / Eliminiating Recurring Voltage Emergencies / Future Directions on Resiliency

Soft Errors in Modern Electronic Systems

Soft Errors in Modern Electronic Systems
A Book

by Michael Nicolaidis

  • Publisher : Springer Science & Business Media
  • Release : 2010-09-24
  • Pages : 318
  • ISBN : 9781441969934
  • Language : En, Es, Fr & De
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This book provides a comprehensive presentation of the most advanced research results and technological developments enabling understanding, qualifying and mitigating the soft errors effect in advanced electronics, including the fundamental physical mechanisms of radiation induced soft errors, the various steps that lead to a system failure, the modelling and simulation of soft error at various levels (including physical, electrical, netlist, event driven, RTL, and system level modelling and simulation), hardware fault injection, accelerated radiation testing and natural environment testing, soft error oriented test structures, process-level, device-level, cell-level, circuit-level, architectural-level, software level and system level soft error mitigation techniques. The book contains a comprehensive presentation of most recent advances on understanding, qualifying and mitigating the soft error effect in advanced electronic systems, presented by academia and industry experts in reliability, fault tolerance, EDA, processor, SoC and system design, and in particular, experts from industries that have faced the soft error impact in terms of product reliability and related business issues and were in the forefront of the countermeasures taken by these companies at multiple levels in order to mitigate the soft error effects at a cost acceptable for commercial products. In a fast moving field, where the impact on ground level electronics is very recent and its severity is steadily increasing at each new process node, impacting one after another various industry sectors (as an example, the Automotive Electronics Council comes to publish qualification requirements on soft errors), research and technology developments and industrial practices have evolve very fast, outdating the most recent books edited at 2004.

Soft-error Mitigation at the Architecture-level Using Berger Codes for Error Detection

Soft-error Mitigation at the Architecture-level Using Berger Codes for Error Detection
A Book

by Edward John Ossi

  • Publisher : Unknown Publisher
  • Release : 2011
  • Pages : 54
  • ISBN : 9876543210XXX
  • Language : En, Es, Fr & De
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Hardware and Software: Verification and Testing

Hardware and Software: Verification and Testing
12th International Haifa Verification Conference, HVC 2016, Haifa, Israel, November 14-17, 2016, Proceedings

by Roderick Bloem,Eli Arbel

  • Publisher : Springer
  • Release : 2016-10-31
  • Pages : 211
  • ISBN : 3319490524
  • Language : En, Es, Fr & De
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This book constitutes the refereed proceedings of the 12th International Haifa Verification Conference, HVC 2016, held in Haifa, Israel in November 2016. The 13 revised full papers and one tool paper presented were carefully reviewed and selected from 26 submissions. They are dedicated to advance the state of the art and state of the practice in verification and testing and are discussing future directions of testing and verification for hardware, software, and complex hybrid systems.

Exploring Memory Hierarchy Design with Emerging Memory Technologies

Exploring Memory Hierarchy Design with Emerging Memory Technologies
A Book

by Guangyu Sun

  • Publisher : Springer Science & Business Media
  • Release : 2013-09-18
  • Pages : 122
  • ISBN : 3319006819
  • Language : En, Es, Fr & De
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This book equips readers with tools for computer architecture of high performance, low power, and high reliability memory hierarchy in computer systems based on emerging memory technologies, such as STTRAM, PCM, FBDRAM, etc. The techniques described offer advantages of high density, near-zero static power, and immunity to soft errors, which have the potential of overcoming the “memory wall.” The authors discuss memory design from various perspectives: emerging memory technologies are employed in the memory hierarchy with novel architecture modification; hybrid memory structure is introduced to leverage advantages from multiple memory technologies; an analytical model named “Moguls” is introduced to explore quantitatively the optimization design of a memory hierarchy; finally, the vulnerability of the CMPs to radiation-based soft errors is improved by replacing different levels of on-chip memory with STT-RAMs.

Design and Test Technology for Dependable Systems-on-chip

Design and Test Technology for Dependable Systems-on-chip
A Book

by Raimund Ubar,Jaan Raik,Heinrich Theodor Vierhaus

  • Publisher : IGI Global
  • Release : 2011-01-01
  • Pages : 550
  • ISBN : 1609602145
  • Language : En, Es, Fr & De
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"This book covers aspects of system design and efficient modelling, and also introduces various fault models and fault mechanisms associated with digital circuits integrated into System on Chip (SoC), Multi-Processor System-on Chip (MPSoC) or Network on Chip (NoC)"--

Transactional Memory. Foundations, Algorithms, Tools, and Applications

Transactional Memory. Foundations, Algorithms, Tools, and Applications
COST Action Euro-TM IC1001

by Rachid Guerraoui,Paolo Romano

  • Publisher : Springer
  • Release : 2014-12-29
  • Pages : 469
  • ISBN : 331914720X
  • Language : En, Es, Fr & De
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The advent of multi-core architectures and cloud-computing has brought parallel programming into the mainstream of software development. Unfortunately, writing scalable parallel programs using traditional lock-based synchronization primitives is well known to be a hard, time consuming and error-prone task, mastered by only a minority of specialized programmers. Building on the familiar abstraction of atomic transactions, Transactional Memory (TM) promises to free programmers from the complexity of conventional synchronization schemes, simplifying the development and verification of concurrent programs, enhancing code reliability, and boosting productivity. Over the last decade TM has been subject to intense research on a broad range of aspects including hardware and operating systems support, language integration, as well as algorithms and theoretical foundations. On the industrial side, the major players of the software and hardware markets have been up-front in the research and development of prototypal products providing support for TM systems. This has recently led to the introduction of hardware TM implementations on mainstream commercial microprocessors and to the integration of TM support for the world’s leading open source compiler. In such a vast inter-disciplinary domain, the Euro-TM COST Action (IC1001) has served as a catalyzer and a bridge for the various research communities looking at disparate, yet subtly interconnected, aspects of TM. This book emerged from the idea having Euro-TM experts compile recent results in the TM area in a single and consistent volume. Contributions have been carefully selected and revised to provide a broad coverage of several fundamental issues associated with the design and implementation of TM systems, including their theoretical underpinnings and algorithmic foundations, programming language integration and verification tools, hardware supports, distributed TM systems, self-tuning mechanisms, as well as lessons learnt from building complex TM-based applications.

Energy-Efficient Fault-Tolerant Systems

Energy-Efficient Fault-Tolerant Systems
A Book

by Jimson Mathew,Rishad A. Shafik,Dhiraj K. Pradhan

  • Publisher : Springer Science & Business Media
  • Release : 2013-09-07
  • Pages : 335
  • ISBN : 1461441935
  • Language : En, Es, Fr & De
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This book describes the state-of-the-art in energy efficient, fault-tolerant embedded systems. It covers the entire product lifecycle of electronic systems design, analysis and testing and includes discussion of both circuit and system-level approaches. Readers will be enabled to meet the conflicting design objectives of energy efficiency and fault-tolerance for reliability, given the up-to-date techniques presented.

Symbolic Parallelization of Nested Loop Programs

Symbolic Parallelization of Nested Loop Programs
A Book

by Alexandru-Petru Tanase,Frank Hannig,Jürgen Teich

  • Publisher : Springer
  • Release : 2018-02-22
  • Pages : 176
  • ISBN : 3319739093
  • Language : En, Es, Fr & De
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This book introduces new compilation techniques, using the polyhedron model for the resource-adaptive parallel execution of loop programs on massively parallel processor arrays. The authors show how to compute optimal symbolic assignments and parallel schedules of loop iterations at compile time, for cases where the number of available cores becomes known only at runtime. The compile/runtime symbolic parallelization approach the authors describe reduces significantly the runtime overhead, compared to dynamic or just‐in-time compilation. The new, on‐demand fault‐tolerant loop processing approach described in this book protects loop nests for parallel execution against soft errors.

Euro-Par 2009 - Parallel Processing

Euro-Par 2009 - Parallel Processing
15th International Euro-Par Conference, Delft, The Netherlands, August 25-28, 2009, Proceedings

by Henk Sips,Dick Epema,Hai-Xiang Lin

  • Publisher : Springer Science & Business Media
  • Release : 2009-08-17
  • Pages : 1120
  • ISBN : 3642038689
  • Language : En, Es, Fr & De
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This book constitutes the refereed proceedings of the 15th International Conference on Parallel Computing, Euro-Par 2009, held in Delft, The Netherlands, in August 2009. The 85 revised papers presented were carefully reviewed and selected from 256 submissions. The papers are organized in topical sections on support tools and environments; performance prediction and evaluation; scheduling and load balancing; high performance architectures and compilers; parallel and distributed databases; grid, cluster, and cloud computing; peer-to-peer computing; distributed systems and algorithms; parallel and distributed programming; parallel numerical algorithms; multicore and manycore programming; theory and algorithms for parallel computation; high performance networks; and mobile and ubiquitous computing.

Dependable Embedded Systems

Dependable Embedded Systems
A Book

by Jörg Henkel,Nikil Dutt

  • Publisher : Springer Nature
  • Release : 2020-12-09
  • Pages : 608
  • ISBN : 303052017X
  • Language : En, Es, Fr & De
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This Open Access book introduces readers to many new techniques for enhancing and optimizing reliability in embedded systems, which have emerged particularly within the last five years. This book introduces the most prominent reliability concerns from today’s points of view and roughly recapitulates the progress in the community so far. Unlike other books that focus on a single abstraction level such circuit level or system level alone, the focus of this book is to deal with the different reliability challenges across different levels starting from the physical level all the way to the system level (cross-layer approaches). The book aims at demonstrating how new hardware/software co-design solution can be proposed to ef-fectively mitigate reliability degradation such as transistor aging, processor variation, temperature effects, soft errors, etc. Provides readers with latest insights into novel, cross-layer methods and models with respect to dependability of embedded systems; Describes cross-layer approaches that can leverage reliability through techniques that are pro-actively designed with respect to techniques at other layers; Explains run-time adaptation and concepts/means of self-organization, in order to achieve error resiliency in complex, future many core systems.

FPGAs and Parallel Architectures for Aerospace Applications

FPGAs and Parallel Architectures for Aerospace Applications
Soft Errors and Fault-Tolerant Design

by Fernanda Kastensmidt,Paolo Rech

  • Publisher : Springer
  • Release : 2015-12-07
  • Pages : 325
  • ISBN : 3319143522
  • Language : En, Es, Fr & De
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This book introduces the concepts of soft errors in FPGAs, as well as the motivation for using commercial, off-the-shelf (COTS) FPGAs in mission-critical and remote applications, such as aerospace. The authors describe the effects of radiation in FPGAs, present a large set of soft-error mitigation techniques that can be applied in these circuits, as well as methods for qualifying these circuits under radiation. Coverage includes radiation effects in FPGAs, fault-tolerant techniques for FPGAs, use of COTS FPGAs in aerospace applications, experimental data of FPGAs under radiation, FPGA embedded processors under radiation and fault injection in FPGAs. Since dedicated parallel processing architectures such as GPUs have become more desirable in aerospace applications due to high computational power, GPU analysis under radiation is also discussed.

Terrestrial Neutron-induced Soft Errors in Advanced Memory Devices

Terrestrial Neutron-induced Soft Errors in Advanced Memory Devices
A Book

by Takashi Nakamura

  • Publisher : World Scientific
  • Release : 2008
  • Pages : 343
  • ISBN : 9812778829
  • Language : En, Es, Fr & De
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There are numerous elaborate and comprehensive textbooks and guidelines on stroke. However, busy clinicians are constantly bombarded with new knowledge for an infinite number of medical conditions. It becomes a challenge for them to tease out the important information that will help guide them through the care of the patient they have right before them. This handbook is thus conceptualized with both the busy clinician and the stroke patient needing urgent treatment in mind. By providing only essential information in a standard and user-friendly layout, it assists clinicians in making real-time decisions quickly and effectively with actual step-by-step guides on specific issues relevant to the care of stroke patients.The use of this practical handbook is instinctive with the topics arranged in chronological order, simulating the actual clinical scenario from a prehospital setting, consultation in the emergency room, admission to the hospital, to secondary prevention in the clinic. With contributions from over 30 stroke experts in Southeast Asia, this handbook is widely applicable in different medical settings and will certainly appeal to stroke specialists, general practitioners, nurses, paramedics, and medical students alike.

Radiation Effects in Semiconductors

Radiation Effects in Semiconductors
A Book

by Krzysztof Iniewski

  • Publisher : CRC Press
  • Release : 2018-09-03
  • Pages : 431
  • ISBN : 1351833758
  • Language : En, Es, Fr & De
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Space applications, nuclear physics, military operations, medical imaging, and especially electronics (modern silicon processing) are obvious fields in which radiation damage can have serious consequences, i.e., degradation of MOS devices and circuits. Zeroing in on vital aspects of this broad and complex topic, Radiation Effects in Semiconductors addresses the ever-growing need for a clear understanding of radiation effects on semiconductor devices and circuits to combat potential damage it can cause. Features a chapter authored by renowned radiation authority Lawrence T. Clark on Radiation Hardened by Design SRAM Strategies for TID and SEE Mitigation This book analyzes the radiation problem, focusing on the most important aspects required for comprehending the degrading effects observed in semiconductor devices, circuits, and systems when they are irradiated. It explores how radiation interacts with solid materials, providing a detailed analysis of three ways this occurs: Photoelectric effect, Compton effect, and creation of electron-positron pairs. The author explains that the probability of these three effects occurring depends on the energy of the incident photon and the atomic number of the target. The book also discusses the effects that photons can have on matter—in terms of ionization effects and nuclear displacement Written for post-graduate researchers, semiconductor engineers, and nuclear and space engineers with some electronics background, this carefully constructed reference explains how ionizing radiation is creating damage in semiconducting devices and circuits and systems—and how that damage can be avoided in areas such as military/space missions, nuclear applications, plasma damage, and X-ray-based techniques. It features top-notch international experts in industry and academia who address emerging detector technologies, circuit design techniques, new materials, and innovative system approaches.

Embedded System Design

Embedded System Design
Embedded Systems Foundations of Cyber-Physical Systems, and the Internet of Things

by Peter Marwedel

  • Publisher : Springer
  • Release : 2017-07-26
  • Pages : 423
  • ISBN : 331956045X
  • Language : En, Es, Fr & De
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A unique feature of this textbook is to provide a comprehensive introduction to the fundamental knowledge in embedded systems, with applications in cyber-physical systems and the Internet of things. It starts with an introduction to the field and a survey of specification models and languages for embedded and cyber-physical systems. It provides a brief overview of hardware devices used for such systems and presents the essentials of system software for embedded systems, including real-time operating systems. The author also discusses evaluation and validation techniques for embedded systems and provides an overview of techniques for mapping applications to execution platforms, including multi-core platforms. Embedded systems have to operate under tight constraints and, hence, the book also contains a selected set of optimization techniques, including software optimization techniques. The book closes with a brief survey on testing. This third edition has been updated and revised to reflect new trends and technologies, such as the importance of cyber-physical systems and the Internet of things, the evolution of single-core processors to multi-core processors, and the increased importance of energy efficiency and thermal issues.

Advances in Computer Systems Architecture

Advances in Computer Systems Architecture
10th Asia-Pacific Conference, ACSAC 2005, Singapore, October 24-26, 2005, Proceedings

by Thambipillai Srikanthan,Jingling Xue,Chip-Hong Chang

  • Publisher : Springer
  • Release : 2005-10-19
  • Pages : 834
  • ISBN : 354032108X
  • Language : En, Es, Fr & De
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On behalf of the ProgramCommittee, we are pleased to present the proceedings of the 2005 Asia-Paci?c Computer Systems Architecture Conference (ACSAC 2005) held in the beautiful and dynamic country of Singapore. This conference was the tenth in its series, one of the leading forums for sharing the emerging research ?ndings in this ?eld. In consultation with the ACSAC Steering Committee, we selected a - member Program Committee. This Program Committee represented a broad spectrum of research expertise to ensure a good balance of research areas, - stitutions and experience while maintaining the high quality of this conference series. This year’s committee was of the same size as last year but had 19 new faces. We received a total of 173 submissions which is 14% more than last year. Each paper was assigned to at least three and in some cases four ProgramC- mittee members for review. Wherever necessary, the committee members called upon the expertise of their colleagues to ensure the highest possible quality in the reviewing process. As a result, we received 415 reviews from the Program Committee members and their 105 co-reviewers whose names are acknowledged inthe proceedings.Theconferencecommitteeadopteda systematicblind review process to provide a fair assessment of all submissions. In the end, we accepted 65 papers on a broad range of topics giving an acceptance rate of 37.5%. We are grateful to all the Program Committee members and the co-reviewers for their e?orts in completing the reviews within a tight schedule.